Using Vias to Improve PCB Density

Vias are very small, yet they are an important part of a circuit board, as they interconnect layers of a multi-layer printed circuit board (PCB). Nothing, not even a component lead, will ever enter a via hole for soldering, and that is what basically differentiates them from a plated through hole (PTH). Moreover, it is not necessary for a via to extend from one side of the board to the other, although they can do so as a through via.

In broad terms, blind vias, starting at one surface on one side of the board will not extend to the other side, while buried vias will remain completely encapsulated within the board, and none of its ends will extend to any surface on the board. The IPC-T-50M, the standard for Terms and Definitions for Interconnecting and Packaging Electronic Circuits defines and identifies seven types of vias:

  1. Tented Vias: These are Type I vias where a mask material bridges over it and no additional is present inside the hole.
  2. Tented and Covered Vias: These are Type II vias with a secondary covering of mask material covering the tented via.
  3. Plugged Vias: These are Type III vias with a material partially penetrating the hole.
  4. Plugged and Covered Vias: These are Type IV vias with a secondary covering of material over the type III vias.
  5. Filled Vias:These are Type V vias with a material fully penetrating and encapsulating the hole.
  6. Filled and Covered Vias: These are Type VI vias with a material covering the Type V vias.
  7. Filled and Capped Vias:These are Type VII vias with a metalized secondary coating covering the Type V vias.

Increasing Density with Vias

The type identification serves to specify the categorization of different via structures, although the industry uses the term via generically or in combination with the adjectives through, blind, or buried, as mentioned above.

High Density Interconnect or HDI technology has a further via structure they call as a microvia. This is essentially a blind via with dimensional requirements—aspect ratio equal to or less than 1:1, and a total depth equal to or less than 0.25 mm.

Increasing PCB Density

Although the classic method of increasing PCB density is to reduce the trace widths and their spacing, this results in increased dielectric losses through thinner traces, and increased crosstalk from reduced spacing. Therefore, the process is not suitable for high-speed board applications. However, fabricators have used other methods in the past, and these are still relevant today:

  • Using landless (padless) vias
  • Using swing vias for breaking out BGA package mounting
  • Using vias filled with solid paste for via-in-pads
  • Using power mesh

For increasing the routing density on a single layer, designers have only five degrees of freedom:

  • Reducing trace width
  • Reducing spacing between traces
  • Reducing the size of vias such as using microvias
  • Reducing the diameter of the annular ring for the vias
  • Using higher layout efficiency when routing

However, using additional signal layers along with the above enhances the routing density on a board considerably.

Experimenting with individual contributions from the above methods leads to the largest effect on the density of a PCB coming from reducing the trace width, followed by reducing the spacing between the traces. As this is often associated with electrical performance issues, designers prefer to reduce the diameter of the annular ring of vias. This very often causes a reduction in via reliability. Designers have found using landless vias along with reducing trace widths and spacings offers the highest layout density.

Rather than blocking several routing channels by using numerous through-holes in a multi-layer PCB, designers have found the use of blind and buried vias increases the routing density tremendously. A comparative study of the amount of space available for routing compared to the entire area on the signal layer, also known as the layout efficiency, offers deep insights into the process. For instance, layout efficiency for through-hole multi-layer boards is only 8-10%. This increases to 16% when designers use through-holes and blind vias, and further increases to 24% when they use through-holes and double-sided blind vias along with multiple buildup layers.

Drilling Microvias with UV Lasers

Traditionally, fabricators have used metal drills to drill through the layers for making vias. With via diameters reducing with increasing demands for higher density, narrower metal drills were necessary. As these were difficult and very expensive to use, fabricators turned to laser drilling, thereby increasing via quality and productivity. The goal was to remove the substrate material with a minimal damage to the thin copper layer. Fabricators used pulsed nanosecond UV lasers to produce a small controlled hole with a sidewall taper. They were able to drill vias with the largest diameters in the range of 50-60 µm, approaching 3000-3300 holes per second.

PCB manufacturers commonly use copper/polyimide/copper laminates for flexible PCBs. Both copper and polyimide layers are very thin, of the order of 10 µm for copper and 13 µm for polyimide, and in some cases still thinner. CO2 lasers are not suitable for drilling these flexible boards and fabricators use ns UV DPSS lasers instead.

Fabricators need to muster several new competencies for successfully implementing HDI strategy with microvias. These include:

  • Selection of material
  • Formation of small diameter vias
  • Imaging and etching fine lines
  • Technology for via filling
  • improving registration
  • Enhancing the boding strength for sub-laminations
  • Technology for metallization

Fabricators prefer the laser via formation over mechanical drilling for the distinctive via shape—a wider opening at the top of the via. This helps in achieving a more uniform plating along the via wall and its capture pad.

Vias with Ball Grid Arrays

With increasing market demand for smaller and thinner electronic devices with greater functionality, PCB designers have started using the ball grid arrays (BGAs) and similar fine-pitch components. However, use of these fine-pitch components have their own tolerance considerations, placement restrictions, and designers need to follow best design practices for multi-layer routings of when using them with vias.

Manufacturability is an important factor when designing with BGAs. This involves the BGA routing scheme, while optimizing the signal integrity with reference to the number of layers of signal and reference. The routing of BGA connections related to each other and to external layers has to follow specific restrictions involving number of layers, pitch angles, via sizes, type of drilling, and others.

Although the most conventional method of routing BGAs is with through-hole vias, they extend through the entire board, and in spite of providing good signal integrity and easy implementation, they take up huge amounts of routing space.

Using blind vias as an alternative to through-hole vias offers the advantage of incorporating stacked vias, or a combination of stacked and staggered vias. While stacked vias allow more density in design, they also require precise alignment, which designers can avoid by using staggered vias. For routing PCBs with very dense BGAs, designers have two choices. One is using the via-in-pad design and the other is using the dogbone routing.

While via-in-pad offers the highest routing density, it also requires high precision, as a displaced via may extend outside the pad, causing signal integrity losses. It also requires the fabricator to fill and cap the via to prevent it from wicking solder leading to dry solder joints.

Provided the BGA pitch spacing allows, dogbone routing is less complex as compared to the via-in-pad and faster to manufacture, as it does not require filling and capping the via. However, it can make the design complex.

Advantages of Via-in-pad Design

Once the BGA or QFN pitch is down to 0.5 mm or smaller, routing traces between the BGA land pads is nearly impossible. Placing vias in between pads and routing to them is also not practical because the geometry involved is very small. Via-in-pad design is the only option here.

Via-in-pad design offers placement of bypass capacitors right underneath the SMD part. This helps in high-speed designs.

Many SMD parts cannot use a heat sink on their top, but provide a thermal pad on the bottom part for connecting to a thermal pad on the other side of the PCB. Via-in-pads provide the connection between the two to take away the heat efficiently from the SMD part. However, the amount of copper in the barrel depends on the fabricator, with thin plating resulting in low heat transfers. Rather than using a few thin-plated vias, it is preferable to fill and cap them, and use them in large numbers. Since inner layers cannot radiate much heat, using topside and bottom-side copper pour layers helps in removing heat more efficiently.

High frequency designs often require the shortest path to the ground plane. Via-in-pads provide this shortest path.

When plugging in and removing a surface mount connector, it undergoes huge stresses strong enough to tear pads off the PCB substrate. Placing vias on these pads offers a structural hold down force creating a reliable product.

However, designers need to be careful to not leave the via-in-pads open, as the via hole can act as a capillary to draw solder off the pad. The situation becomes worse with larger diameter holes. Since not much solder remains to secure the pin of the component, the result is a dry solder or an open joint. Even after filling and tenting the via-in-pads, BGAs require their pads well-finished and leveled, as BGAs are very susceptible to the problem of excess solder on the pads, since the excess solder can create shorts with the neighboring pad.


With proper design and by following best practices, designers can use different types of vias to improve their PCB density significantly. Together with multiple ultrathin layers, laser-drilled microvias, via-in-pads, and staggered vias, designers can make their PCBs suitable for the latest wearable electronic technology. Fabricators use microvias to make multi-layer flexible PCBs with HDI technology that go into the hand-held mobiles we use every day.

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